Some electronic systems include a serial data communication interface to communicate between different integrated circuits (ICs) in a system. One such serial data communication interface can be the I2C (Inter-IC Interface) created by NXP Semiconductor.
One such conventional system 1000 is shown in FIG. 10. In the conventional system 1000, a host processor 1001 may communicate with an intermediary I2C device 1003 over a host I2C bus 1005. The intermediary I2C device 1003 can, in turn, communicate with several downstream (DS) devices 1009-0 to 1009-n on a separate “downstream” I2C bus 1007. The intermediary I2C device 1003 may be used to consolidate information from the DS devices (1009-0 to 1009-n) such that the host processor 1001 is relieved of the burden of communicating with each DS device (1009-0 to 1009-n) independently. More particularly, an I2C master circuit 1023 can consolidate data from the DS devices (1009-0 to 1009-n) for transmission to host processor 1001 via an I2C slave circuit 1017. In an alternate embodiment intermediary I2C device 1003 may operate as an off-line processing device, interrogating and responding to the attached downstream devices as needed. This allows the host processor 1001 to remain in a powered down or inactive state until specific conditions or events occur that require communication with the host processor 1001.
In such a conventional system 1000, both the intermediary I2C device 1003 and DS devices (1009-0 to 1009-n) may require in-system firmware updates using “bootloading”. Bootloading can update system firmware from a host processor 1001 over an established serial communication interface (I/F), such as an I2C interface, rather than using a traditional programming interface which requires pins in addition to those of the serial communication I/F. However, since the host processor 1001 does not have a direct connection to the DS devices (1009-0 to 1009-n), a special method is required to enable bootloading of the downstream DS devices.
One such special method of bootloading DS devices (1009-0 to 1009-n) in a conventional system 1000 can be to include an intermediary processor 1011 that can perform bootloading functions. Therefore, in a conventional system 1000 a host processor 1001 can have a system memory 1013 that includes bootloader code 1015 for executing bootload operations for devices attached to the host I2C bus 1005 (i.e., intermediary I2C device 1003). However, at the same time, an intermediary processor 1011 can have a separate system memory 1019 with its own bootloader code 1021 for executing bootload operations for devices attached to the downstream I2C bus 1007 (i.e., DS devices 1009-0 to 1009-n).